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At the Ignite developer conference today, Microsoft unveiled two new chips designed for its data center infrastructure: the Azure Integrated HSM and the Azure Boost DPU.
Scheduled for release in the coming months, these custom-designed chips aim to address security and efficiency gaps faced in existing data centers, further optimizing their servers for large-scale AI workloads. The announcement follows the launch of Microsoft’s Maia AI accelerators and Cobalt CPUs, marking another major step in the company’s comprehensive strategy to rethink and optimize every layer of its stack— from silicon to software—to support advanced AI.
The Satya Nadella-led company also detailed new approaches aimed at managing power usage and heat emissions of data centers, as many continue to raise alarms over the environmental impact of data centers running AI.
Just recently, Goldman Sachs published research estimating that advanced AI workloads are poised to drive a 160% increase in data center power demand by 2030, with these facilities consuming 3-4% of global power by the end of the decade.
The new chips
While continuing to use industry-leading hardware from companies like Nvidia and AMD, Microsoft has been pushing the bar with its custom chips.
Last year at Ignite, the company made headlines with Azure Maia AI accelerator, optimized for artificial intelligence tasks and generative AI, as well as Azure Cobalt CPU, an Arm-based processor tailored to run general-purpose compute workloads on the Microsoft Cloud.
Now, as the next step in this journey, it has expanded its custom silicon portfolio with a specific focus on security and efficiency.
The new in-house security chip, Azure Integrated HSM, comes with a dedicated hardware security module, designed to meet FIPS 140-3 Level 3 security standards.
According to Omar Khan, the vice president for Azure Infrastructure marketing, the module essentially hardens key management to make sure encryption and signing keys stay secure within the bounds of the chip, without compromising performance or increasing latency.
To achieve this, Azure Integrated HSM leverages specialized hardware cryptographic accelerators that enable secure, high-performance cryptographic operations directly within the chip’s physically isolated environment. Unlike traditional HSM architectures that require network round-trips or key extraction, the chip performs encryption, decryption, signing, and verification operations entirely within its dedicated hardware boundary.
While Integrated HSM paves the way for enhanced data protection, Azure Boost DPU (data processing unit) optimizes data centers for highly multiplexed data streams corres …